This invention relates to gas discharge (plasma) displays, and more particularly to color gas discharge display panels.
Multiple cell gas discharge display and/or memory panels of one particular type with which the present invention is concerned are characterized by an ionizable gaseous medium, at an appropriate gas pressure, in a thin gas chamber or space between a pair of opposed dielectric charge storage members. The dielectric charge storage members are typically backed by arrays of electrodes or conductors which are appropriately oriented so as to define a plurality of discrete gas discharge unit or cell sites.
In some embodiments, the discharge cells are additionally defined by surrounding or confining physical structures such as apertures in perforated glass plates and the like so as to be physically isolated relative to other cells.
In either case, with or without the confining physical structure, electronic charges are produced upon the ionization of the gas volume at a selected discharge cell, when proper alternating operating potentials are applied to selected electrodes or conductors thereof. The electronic charges are collected upon and/or within the dielectric at specific locations defined by the crossovers of opposite electrodes. These charges constitute an electrical field opposing the electrical field which created them so as to terminate the gas discharge for the remainder of the half cycle and aid in the initiation of a gas discharge on a succeeding opposite half cycle of applied voltage. Such dielectric charges as are stored constitute an electrical memory.
The dielectric members prevent the passage of substantial conductive current from the conductor members to the gaseous medium and also serve to collect or store ionized gaseous medium charges during the cycles of the operating potentials. Such charges collect first at one elemental or discrete dielectric surface area and then at an opposing elemental or discrete dielectric surface area on alternate half cycles to constitute the electrical memory.
An example of a panel structure containing nonphysically isolated or open discharge cells is disclosed in U.S. Pat. No. 3,499,167 (incorporated herein by reference) issued to Baker, et al.
An example of a panel containing physically isolated cells is disclosed in U.S. Pat. No. 3,559,190 (incorporated herein by reference) issued to Bitzer, et al.
A monolithic or single substrate device structure may also be used as disclosed in U.S. Pat. Nos. 3,860,846 (Mayer), U.S. Pat. No. 3,964,050 (Mayer), U.S. Pat. No. 4,080,597 (Mayer), U.S. Pat. No. 3,646,384 (Lay) and U.S. Pat. No. 3,896,327 (Schermerhorn), all incorporated herein by reference.
In the construction of the panel, a continuous volume of ionizable gas is confined between a pair of dielectric surfaces backed by electrode arrays typically forming matrix elements locating individual pixels in the display. The two electrode arrays may be orthogonally related sets of parallel lines. However, any other configuration of electrodes may be used. The two arrays of electrodes define at their crossovers a plurality of opposed pairs of charge storage areas on the opposing surfaces of the dielectric members bonding or confining the gas. Thus, for a first array of R parallel row electrodes and a second array of C parallel column electrodes, the number of gas discharge cells will be the multiple of R times C. The number of dielectric charge storage locations will be twice the number of discharge cells where the electrodes of each array are separated from the gas by a dielectric member.
It is possible to have only one electrode array insulated from the gas with an dielectric member and have the other opposing electrode array in direct contact with the gas, or coupled to the gas through a resistive layer.
In one monolithic panel structure, a first dielectric layer is applied over a first array of X-electrodes and a second array of Y-electrodes is applied over the first dielectric layer. A second dielectric layer is then applied over the second array of Y-electrodes. A top envelope portion is applied over the substrate and filled with ionizable gas such that a chamber of gas is above the second dielectric layer.
In the monolithic device structure, the dielectric applied over the bottom X-electrodes must be capable of physically, mechanically and structurally supporting the array of top Y-electrodes applied over the first dielectric portion without flexure or movement of the electrodes. Such dielectric support of the Y-electrodes is especially important during the various process thermal cycles. Thus, it is important that the supporting dielectric portion not become soft and flow or develop cracks or flaws during the application of the Y-electrode or during the application of a second dielectric portion covering the Y-electrodes or during the sealing together of the envelope and substrate.
Bitzer et al. U.S. Pat. No. 3,559,190, referred to above, discloses an AC plasma display with a multiplicity of physically isolated cells with phosphor deposited on the walls of the cells. Baker et al. U.S. Pat. No. 3,499,167, referred to above, discloses an AC plasma display having "open" cell structures, one embodiment of which includes an array of grooves, channels or troughs aligned with an array of dielectric covered electrode array. Schermerhorn U.S. Pat. No. 3,896,327 discloses an AC plasma display having a common substrate for the dielectrically covered electrode arrays and cavities in the dielectric for the discharge sites to form a so-called "monolithic" display panel.
Knauer et al. U.S. Pat. No. 4,827,186 discloses an alternating current plasma display panel (AC-PDP) in which an etched or chemically milled imperforate barrier structure has upstanding posts with cell sidewalls defining concavities intermediate the posts. The imperforate structure has a plurality of such concavities, each associated with a unique cell and providing an intercell barrier structure. The cell sidewalls are provided with priming particle passing gaps and UV responsive phosphor islands are deposited on the surface of a front dielectric structure.
In contrast, in the present invention, elongated channels, troughs or grooves are chemically milled in the dielectric layers, and the channels, troughs, or grooves have elongated ribs or lands therebetween. The sloping rib walls are coated with a phosphor structure (undercoat/phosphor/overcoat) which significantly enhances the light output because the phosphor surfaces are greater in extent area-wise, closer to the UV sources in the discharge and are not in the path of discharge products. Since light is produced in two spaced areas of phosphor by the UV produced on discharge, more light is produced and the electrodes have less attenuating effect on visible light emission from each side. Moreover, since the channels, troughs or grooves, in a preferred embodiment, are formed in a second (and even a third) dielectric layer, the seal area or zone (for securing a second electrode bearing substrate to form the matrix) can be on the first dielectric layer with the ends of the channels, troughs or grooves formed in the second (and even third) dielectric layer being in free connection via a transition corridor for exemplary or ideal vacuum bake-out operations with the transition corridor serving as the site for border conditioning discharge sites.